distortos  v0.4.0
object-oriented C++ RTOS for microcontrollers
distortosConfiguration.h File Reference

distortos configuration More...

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Macros

#define CONFIG_CHIP_STM32
 
#define CONFIG_CHIP_STM32F4
 
#define CONFIG_BOARD_STM32F4DISCOVERY
 
#define CONFIG_BOARD_INCLUDES   "source/board/STM32/STM32F4/STM32F4DISCOVERY/include"
 
#define CONFIG_BOARD   "STM32F4DISCOVERY"
 
#define CONFIG_CHIP_STM32F4_VDD_MV_DEFAULT   3000
 
#define CONFIG_CHIP_STM32F4_RCC_HSE_FREQUENCY_DEFAULT   8000000
 
#define CONFIG_BOARD_BUTTONS_ENABLE
 
#define CONFIG_BOARD_LEDS_ENABLE
 
#define CONFIG_BOARD_HAS_BUTTONS
 
#define CONFIG_BOARD_HAS_LEDS
 
#define CONFIG_CHIP_ROM_SIZE   1048576
 
#define CONFIG_CHIP_ROM_ADDRESS   0x08000000
 
#define CONFIG_CHIP   "STM32F407VG"
 
#define CONFIG_CHIP_INCLUDES   "source/chip/STM32/include source/chip/STM32/STM32F4/include source/chip/STM32/peripherals/GPIOv2/include source/chip/STM32/peripherals/SPIv1/include source/chip/STM32/peripherals/USARTv1/include external/CMSIS-STM32F4 external/CMSIS"
 
#define CONFIG_CHIP_STM32F4_VDD_MV   3000
 
#define CONFIG_CHIP_STM32F4_STANDARD_CLOCK_CONFIGURATION_ENABLE
 
#define CONFIG_CHIP_STM32F4_PWR_VOLTAGE_SCALE_MODE   1
 
#define CONFIG_CHIP_STM32F4_RCC_HSE_ENABLE
 
#define CONFIG_CHIP_STM32F4_RCC_HSE_FREQUENCY   8000000
 
#define CONFIG_CHIP_STM32F4_RCC_PLL_ENABLE
 
#define CONFIG_CHIP_STM32F4_RCC_PLLSRC_HSE
 
#define CONFIG_CHIP_STM32F4_RCC_PLLM   4
 
#define CONFIG_CHIP_STM32F4_RCC_PLLN   168
 
#define CONFIG_CHIP_STM32F4_RCC_PLLP_DIV2
 
#define CONFIG_CHIP_STM32F4_RCC_PLLQ   7
 
#define CONFIG_CHIP_STM32F4_RCC_SYSCLK_PLL
 
#define CONFIG_CHIP_STM32F4_RCC_AHB_DIV1
 
#define CONFIG_CHIP_STM32F4_RCC_APB1_DIV4
 
#define CONFIG_CHIP_STM32F4_RCC_APB2_DIV2
 
#define CONFIG_CHIP_STM32F4_FLASH_DATA_CACHE_ENABLE
 
#define CONFIG_CHIP_STM32F4_FLASH_INSTRUCTION_CACHE_ENABLE
 
#define CONFIG_CHIP_STM32F4_UNIFY_SRAM1_SRAM2
 
#define CONFIG_CHIP_STM32F40
 
#define CONFIG_CHIP_STM32F407
 
#define CONFIG_CHIP_STM32F407V
 
#define CONFIG_CHIP_STM32F407VG
 
#define CONFIG_CHIP_STM32F4_BKPSRAM_SIZE   4096
 
#define CONFIG_CHIP_STM32F4_BKPSRAM_ADDRESS   0x40024000
 
#define CONFIG_CHIP_STM32F4_CCM_SIZE   65536
 
#define CONFIG_CHIP_STM32F4_CCM_ADDRESS   0x10000000
 
#define CONFIG_CHIP_STM32F4_SRAM1_SIZE   114688
 
#define CONFIG_CHIP_STM32F4_SRAM1_ADDRESS   0x20000000
 
#define CONFIG_CHIP_STM32F4_SRAM2_SIZE   16384
 
#define CONFIG_CHIP_STM32F4_SRAM2_ADDRESS   0x2001c000
 
#define CONFIG_CHIP_STM32F4_SRAM3_SIZE   0
 
#define CONFIG_CHIP_STM32F4_RCC_HPRE   1
 
#define CONFIG_CHIP_STM32F4_RCC_PLLP   2
 
#define CONFIG_CHIP_STM32F4_RCC_PPRE1   4
 
#define CONFIG_CHIP_STM32F4_RCC_PPRE2   2
 
#define CONFIG_CHIP_STM32_GPIOV2_GPIOA_ENABLE
 
#define CONFIG_CHIP_STM32_GPIOV2_GPIOD_ENABLE
 
#define CONFIG_CHIP_STM32_GPIOV2_HAS_4_AF_BITS
 
#define CONFIG_CHIP_STM32_GPIOV2_HAS_HIGH_SPEED
 
#define CONFIG_CHIP_STM32_GPIOV2_HAS_GPIOA
 
#define CONFIG_CHIP_STM32_GPIOV2_HAS_GPIOB
 
#define CONFIG_CHIP_STM32_GPIOV2_HAS_GPIOC
 
#define CONFIG_CHIP_STM32_GPIOV2_HAS_GPIOD
 
#define CONFIG_CHIP_STM32_GPIOV2_HAS_GPIOE
 
#define CONFIG_CHIP_STM32_GPIOV2_HAS_GPIOH
 
#define CONFIG_CHIP_STM32_GPIOV2
 
#define CONFIG_CHIP_STM32_SPIV1
 
#define CONFIG_CHIP_STM32_USARTV1
 
#define CONFIG_CHIP_STM32_SPIV1_HAS_SPI1
 
#define CONFIG_CHIP_STM32_SPIV1_HAS_SPI2
 
#define CONFIG_CHIP_STM32_SPIV1_HAS_SPI3
 
#define CONFIG_CHIP_STM32_USARTV1_HAS_CR1_OVER8_BIT
 
#define CONFIG_CHIP_STM32_USARTV1_HAS_USART1
 
#define CONFIG_CHIP_STM32_USARTV1_HAS_USART2
 
#define CONFIG_CHIP_STM32_USARTV1_HAS_USART3
 
#define CONFIG_CHIP_STM32_USARTV1_HAS_UART4
 
#define CONFIG_CHIP_STM32_USARTV1_HAS_UART5
 
#define CONFIG_CHIP_STM32_USARTV1_HAS_USART6
 
#define CONFIG_ARCHITECTURE_ARMV7_M
 
#define CONFIG_ARCHITECTURE_STACK_ALIGNMENT   8
 
#define CONFIG_TOOLCHAIN_PREFIX   "arm-none-eabi-"
 
#define CONFIG_ARCHITECTURE_FLAGS   "-mcpu=cortex-m4 -mthumb -mfloat-abi=hard -mfpu=fpv4-sp-d16"
 
#define CONFIG_ARCHITECTURE_ARMV7_M_KERNEL_BASEPRI   0
 
#define CONFIG_ARCHITECTURE_ARM_CORTEX_M4
 
#define CONFIG_ARCHITECTURE_ARM_CORTEX_M4_R0P1
 
#define CONFIG_ARCHITECTURE_ARMV6_M_ARMV7_M_MAIN_STACK_SIZE   1024
 
#define CONFIG_ARCHITECTURE_INCLUDES   "source/architecture/ARM/ARMv6-M-ARMv7-M/include"
 
#define CONFIG_ARCHITECTURE_FPU
 
#define CONFIG_ARCHITECTURE_HAS_FPU
 
#define CONFIG_ARCHITECTURE_ARM
 
#define CONFIG_TICK_FREQUENCY   1000
 
#define CONFIG_ROUND_ROBIN_FREQUENCY   10
 
#define CONFIG_THREAD_DETACH_ENABLE
 
#define CONFIG_MAIN_THREAD_STACK_SIZE   4096
 
#define CONFIG_MAIN_THREAD_PRIORITY   127
 
#define CONFIG_MAIN_THREAD_CAN_RECEIVE_SIGNALS
 
#define CONFIG_MAIN_THREAD_QUEUED_SIGNALS   8
 
#define CONFIG_MAIN_THREAD_SIGNAL_ACTIONS   8
 
#define CONFIG_CHECK_FUNCTION_CONTEXT_ENABLE
 
#define CONFIG_CHECK_STACK_POINTER_RANGE_CONTEXT_SWITCH_ENABLE
 
#define CONFIG_CHECK_STACK_POINTER_RANGE_SYSTEM_TICK_ENABLE
 
#define CONFIG_CHECK_STACK_GUARD_CONTEXT_SWITCH_ENABLE
 
#define CONFIG_CHECK_STACK_GUARD_SYSTEM_TICK_ENABLE
 
#define CONFIG_STACK_GUARD_SIZE   32
 
#define CONFIG_TEST_APPLICATION_ENABLE
 
#define CONFIG_BUILD_OPTIMIZATION_O2
 
#define CONFIG_DEBUGGING_INFORMATION_ENABLE
 
#define CONFIG_ASSERT_ENABLE
 
#define CONFIG_LDSCRIPT_ROM_BEGIN   0
 
#define CONFIG_LDSCRIPT_ROM_END   1048576
 
#define CONFIG_BUILD_OPTIMIZATION   "-O2"
 
#define CONFIG_DEBUGGING_INFORMATION_COMPILATION   "-g -ggdb3"
 
#define CONFIG_DEBUGGING_INFORMATION_LINKING   "-g"
 
#define CONFIG_ASSERT   ""
 

Detailed Description

distortos configuration

Warning
Automatically generated file - do not edit!
Date
2017-03-11 15:36:56