distortos  v0.5.0
object-oriented C++ RTOS for microcontrollers
distortosConfiguration.h
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1 
11 #ifndef INCLUDE_DISTORTOS_DISTORTOSCONFIGURATION_H_
12 #define INCLUDE_DISTORTOS_DISTORTOSCONFIGURATION_H_
13 
14 #define CONFIG_CHIP_STM32 1
15 #define CONFIG_CHIP_STM32F4 1
16 #define CONFIG_BOARD_SOURCE_BOARD_ST_STM32F4DISCOVERY_ST_STM32F4DISCOVERY 1
17 #define CONFIG_CHIP_STM32F4_VDD_MV_DEFAULT 3000
18 #define CONFIG_CHIP_STM32F4_RCC_HSE_FREQUENCY_DEFAULT 8000000
19 #define CONFIG_BOARD_INCLUDES "source/board/ST_STM32F4DISCOVERY/include"
20 #define CONFIG_BOARD "ST,STM32F4DISCOVERY"
21 #define CONFIG_LDSCRIPT "source/board/ST_STM32F4DISCOVERY/ST_STM32F4DISCOVERY.ld"
22 #define CONFIG_BOARD_HAS_BUTTONS 1
23 #define CONFIG_BOARD_HAS_LEDS 1
24 #define CONFIG_KCONFIG_BOARDOPTIONS_STM32_GPIO 1
25 #define CONFIG_BOARD_BUTTONS_ENABLE 1
26 #define CONFIG_BOARD_LEDS_ENABLE 1
27 #define CONFIG_BOARD_HAS_DTS 1
28 #define CONFIG_CHIP_ROM_SIZE 1048576
29 #define CONFIG_CHIP_ROM_ADDRESS 0x08000000
30 #define CONFIG_CHIP "STM32F407VG"
31 #define CONFIG_CHIP_INCLUDES "source/chip/STM32/include source/chip/STM32/STM32F4/include source/chip/STM32/peripherals/GPIOv2/include source/chip/STM32/peripherals/SPIv1/include source/chip/STM32/peripherals/USARTv1/include external/CMSIS-STM32F4 external/CMSIS"
32 #define CONFIG_CHIP_STM32F4_VDD_MV 3000
33 #define CONFIG_CHIP_STM32F4_STANDARD_CLOCK_CONFIGURATION_ENABLE 1
34 #define CONFIG_CHIP_STM32F4_PWR_VOLTAGE_SCALE_MODE 1
35 #define CONFIG_CHIP_STM32F4_RCC_HSE_ENABLE 1
36 #define CONFIG_CHIP_STM32F4_RCC_HSE_FREQUENCY 8000000
37 #define CONFIG_CHIP_STM32F4_RCC_PLL_ENABLE 1
38 #define CONFIG_CHIP_STM32F4_RCC_PLLSRC_HSE 1
39 #define CONFIG_CHIP_STM32F4_RCC_PLLM 4
40 #define CONFIG_CHIP_STM32F4_RCC_PLLN 168
41 #define CONFIG_CHIP_STM32F4_RCC_PLLP_DIV2 1
42 #define CONFIG_CHIP_STM32F4_RCC_PLLQ 7
43 #define CONFIG_CHIP_STM32F4_RCC_SYSCLK_PLL 1
44 #define CONFIG_CHIP_STM32F4_RCC_AHB_DIV1 1
45 #define CONFIG_CHIP_STM32F4_RCC_APB1_DIV4 1
46 #define CONFIG_CHIP_STM32F4_RCC_APB2_DIV2 1
47 #define CONFIG_CHIP_STM32F4_FLASH_DATA_CACHE_ENABLE 1
48 #define CONFIG_CHIP_STM32F4_FLASH_INSTRUCTION_CACHE_ENABLE 1
49 #define CONFIG_CHIP_STM32F40 1
50 #define CONFIG_CHIP_STM32F407 1
51 #define CONFIG_CHIP_STM32F407V 1
52 #define CONFIG_CHIP_STM32F407VG 1
53 #define CONFIG_CHIP_STM32F4_BKPSRAM_SIZE 4096
54 #define CONFIG_CHIP_STM32F4_BKPSRAM_ADDRESS 0x40024000
55 #define CONFIG_CHIP_STM32F4_CCM_SIZE 65536
56 #define CONFIG_CHIP_STM32F4_CCM_ADDRESS 0x10000000
57 #define CONFIG_CHIP_STM32F4_SRAM1_SIZE 114688
58 #define CONFIG_CHIP_STM32F4_SRAM1_ADDRESS 0x20000000
59 #define CONFIG_CHIP_STM32F4_SRAM2_SIZE 16384
60 #define CONFIG_CHIP_STM32F4_SRAM2_ADDRESS 0x2001c000
61 #define CONFIG_CHIP_STM32F4_SRAM3_SIZE 0
62 #define CONFIG_CHIP_STM32F4_RCC_HPRE 1
63 #define CONFIG_CHIP_STM32F4_RCC_PLLP 2
64 #define CONFIG_CHIP_STM32F4_RCC_PPRE1 4
65 #define CONFIG_CHIP_STM32F4_RCC_PPRE2 2
66 #define CONFIG_CHIP_STM32_GPIOV2_GPIOA_ENABLE 1
67 #define CONFIG_CHIP_STM32_GPIOV2_GPIOD_ENABLE 1
68 #define CONFIG_CHIP_STM32_GPIOV2_HAS_4_AF_BITS 1
69 #define CONFIG_CHIP_STM32_GPIOV2_HAS_HIGH_SPEED 1
70 #define CONFIG_CHIP_STM32_GPIOV2_HAS_GPIOA 1
71 #define CONFIG_CHIP_STM32_GPIOV2_HAS_GPIOB 1
72 #define CONFIG_CHIP_STM32_GPIOV2_HAS_GPIOC 1
73 #define CONFIG_CHIP_STM32_GPIOV2_HAS_GPIOD 1
74 #define CONFIG_CHIP_STM32_GPIOV2_HAS_GPIOE 1
75 #define CONFIG_CHIP_STM32_GPIOV2_HAS_GPIOH 1
76 #define CONFIG_CHIP_STM32_GPIOV2 1
77 #define CONFIG_CHIP_STM32_SPIV1 1
78 #define CONFIG_CHIP_STM32_USARTV1 1
79 #define CONFIG_CHIP_STM32_SPIV1_HAS_SPI1 1
80 #define CONFIG_CHIP_STM32_SPIV1_HAS_SPI2 1
81 #define CONFIG_CHIP_STM32_SPIV1_HAS_SPI3 1
82 #define CONFIG_CHIP_STM32_USARTV1_HAS_CR1_OVER8_BIT 1
83 #define CONFIG_CHIP_STM32_USARTV1_HAS_USART1 1
84 #define CONFIG_CHIP_STM32_USARTV1_HAS_USART2 1
85 #define CONFIG_CHIP_STM32_USARTV1_HAS_USART3 1
86 #define CONFIG_CHIP_STM32_USARTV1_HAS_UART4 1
87 #define CONFIG_CHIP_STM32_USARTV1_HAS_UART5 1
88 #define CONFIG_CHIP_STM32_USARTV1_HAS_USART6 1
89 #define CONFIG_ARCHITECTURE_ARMV7_M 1
90 #define CONFIG_ARCHITECTURE_STACK_ALIGNMENT 8
91 #define CONFIG_TOOLCHAIN_PREFIX "arm-none-eabi-"
92 #define CONFIG_ARCHITECTURE_FLAGS "-mcpu=cortex-m4 -mthumb -mfloat-abi=hard -mfpu=fpv4-sp-d16"
93 #define CONFIG_ARCHITECTURE_ARMV7_M_KERNEL_BASEPRI 0
94 #define CONFIG_ARCHITECTURE_ARM_CORTEX_M4 1
95 #define CONFIG_ARCHITECTURE_ARM_CORTEX_M4_R0P1 1
96 #define CONFIG_ARCHITECTURE_ARMV6_M_ARMV7_M_MAIN_STACK_SIZE 1024
97 #define CONFIG_ARCHITECTURE_INCLUDES "source/architecture/ARM/ARMv6-M-ARMv7-M/include"
98 #define CONFIG_ARCHITECTURE_FPU 1
99 #define CONFIG_ARCHITECTURE_HAS_FPU 1
100 #define CONFIG_ARCHITECTURE_ARM 1
101 #define CONFIG_TICK_FREQUENCY 1000
102 #define CONFIG_ROUND_ROBIN_FREQUENCY 10
103 #define CONFIG_SIGNALS_ENABLE 1
104 #define CONFIG_THREAD_DETACH_ENABLE 1
105 #define CONFIG_MAIN_THREAD_STACK_SIZE 4096
106 #define CONFIG_MAIN_THREAD_PRIORITY 127
107 #define CONFIG_MAIN_THREAD_CAN_RECEIVE_SIGNALS 1
108 #define CONFIG_MAIN_THREAD_QUEUED_SIGNALS 8
109 #define CONFIG_MAIN_THREAD_SIGNAL_ACTIONS 8
110 #define CONFIG_CHECK_FUNCTION_CONTEXT_ENABLE 1
111 #define CONFIG_CHECK_STACK_POINTER_RANGE_CONTEXT_SWITCH_ENABLE 1
112 #define CONFIG_CHECK_STACK_POINTER_RANGE_SYSTEM_TICK_ENABLE 1
113 #define CONFIG_CHECK_STACK_GUARD_CONTEXT_SWITCH_ENABLE 1
114 #define CONFIG_CHECK_STACK_GUARD_SYSTEM_TICK_ENABLE 1
115 #define CONFIG_STACK_GUARD_SIZE 32
116 #define CONFIG_TEST_APPLICATION_ENABLE 1
117 #define CONFIG_BUILD_OPTIMIZATION_O2 1
118 #define CONFIG_DEBUGGING_INFORMATION_ENABLE 1
119 #define CONFIG_ASSERT_ENABLE 1
120 #define CONFIG_LDSCRIPT_ROM_BEGIN 0
121 #define CONFIG_LDSCRIPT_ROM_END 1048576
122 #define CONFIG_BUILD_OPTIMIZATION "-O2"
123 #define CONFIG_LINK_TIME_OPTIMIZATION_COMPILATION ""
124 #define CONFIG_LINK_TIME_OPTIMIZATION_LINKING ""
125 #define CONFIG_STATIC_DESTRUCTORS_RUN_TIME_REGISTRATION "-fno-use-cxa-atexit"
126 #define CONFIG_DEBUGGING_INFORMATION_COMPILATION "-g -ggdb3"
127 #define CONFIG_DEBUGGING_INFORMATION_LINKING "-g"
128 #define CONFIG_ASSERT ""
129 
130 #endif /* INCLUDE_DISTORTOS_DISTORTOSCONFIGURATION_H_ */