Chip-related code of distortos project. More...

Classes
class	ChipInputPin

class	ChipOutputPin

class	ChipSpiMasterLowLevel

class	ChipUartLowLevel

class	DmaChannel

class	DmaChannelFunctor

class	DmaChannelFunctorCommon

class	DmaChannelHandle

class	DmaChannelPeripheral
	DmaChannelPeripheral class is a raw DMA channel peripheral for DMAv2 in STM32. More...

class	DmaPeripheral
	DmaPeripheral class is a raw DMA peripheral for DMAv2 in STM32. More...

class	SpiMasterLowLevelDmaBased

class	SpiMasterLowLevelInterruptBased

class	SpiPeripheral
	SpiPeripheral class is a raw SPI peripheral for SPIv1 in STM32. More...

Enumerations
enum	Pin : uint32_t { Pin::pa0 = GPIOA_BASE \| 0, Pin::pa1 = GPIOA_BASE \| 1, Pin::pa2 = GPIOA_BASE \| 2, Pin::pa3 = GPIOA_BASE \| 3, Pin::pa4 = GPIOA_BASE \| 4, Pin::pa5 = GPIOA_BASE \| 5, Pin::pa6 = GPIOA_BASE \| 6, Pin::pa7 = GPIOA_BASE \| 7, Pin::pa8 = GPIOA_BASE \| 8, Pin::pa9 = GPIOA_BASE \| 9, Pin::pa10 = GPIOA_BASE \| 10, Pin::pa11 = GPIOA_BASE \| 11, Pin::pa12 = GPIOA_BASE \| 12, Pin::pa13 = GPIOA_BASE \| 13, Pin::pa14 = GPIOA_BASE \| 14, Pin::pa15 = GPIOA_BASE \| 15, Pin::pb0 = GPIOB_BASE \| 0, Pin::pb1 = GPIOB_BASE \| 1, Pin::pb2 = GPIOB_BASE \| 2, Pin::pb3 = GPIOB_BASE \| 3, Pin::pb4 = GPIOB_BASE \| 4, Pin::pb5 = GPIOB_BASE \| 5, Pin::pb6 = GPIOB_BASE \| 6, Pin::pb7 = GPIOB_BASE \| 7, Pin::pb8 = GPIOB_BASE \| 8, Pin::pb9 = GPIOB_BASE \| 9, Pin::pb10 = GPIOB_BASE \| 10, Pin::pb11 = GPIOB_BASE \| 11, Pin::pb12 = GPIOB_BASE \| 12, Pin::pb13 = GPIOB_BASE \| 13, Pin::pb14 = GPIOB_BASE \| 14, Pin::pb15 = GPIOB_BASE \| 15, Pin::pc0 = GPIOC_BASE \| 0, Pin::pc1 = GPIOC_BASE \| 1, Pin::pc2 = GPIOC_BASE \| 2, Pin::pc3 = GPIOC_BASE \| 3, Pin::pc4 = GPIOC_BASE \| 4, Pin::pc5 = GPIOC_BASE \| 5, Pin::pc6 = GPIOC_BASE \| 6, Pin::pc7 = GPIOC_BASE \| 7, Pin::pc8 = GPIOC_BASE \| 8, Pin::pc9 = GPIOC_BASE \| 9, Pin::pc10 = GPIOC_BASE \| 10, Pin::pc11 = GPIOC_BASE \| 11, Pin::pc12 = GPIOC_BASE \| 12, Pin::pc13 = GPIOC_BASE \| 13, Pin::pc14 = GPIOC_BASE \| 14, Pin::pc15 = GPIOC_BASE \| 15, Pin::pd0 = GPIOD_BASE \| 0, Pin::pd1 = GPIOD_BASE \| 1, Pin::pd2 = GPIOD_BASE \| 2, Pin::pd3 = GPIOD_BASE \| 3, Pin::pd4 = GPIOD_BASE \| 4, Pin::pd5 = GPIOD_BASE \| 5, Pin::pd6 = GPIOD_BASE \| 6, Pin::pd7 = GPIOD_BASE \| 7, Pin::pd8 = GPIOD_BASE \| 8, Pin::pd9 = GPIOD_BASE \| 9, Pin::pd10 = GPIOD_BASE \| 10, Pin::pd11 = GPIOD_BASE \| 11, Pin::pd12 = GPIOD_BASE \| 12, Pin::pd13 = GPIOD_BASE \| 13, Pin::pd14 = GPIOD_BASE \| 14, Pin::pd15 = GPIOD_BASE \| 15, Pin::pe0 = GPIOE_BASE \| 0, Pin::pe1 = GPIOE_BASE \| 1, Pin::pe2 = GPIOE_BASE \| 2, Pin::pe3 = GPIOE_BASE \| 3, Pin::pe4 = GPIOE_BASE \| 4, Pin::pe5 = GPIOE_BASE \| 5, Pin::pe6 = GPIOE_BASE \| 6, Pin::pe7 = GPIOE_BASE \| 7, Pin::pe8 = GPIOE_BASE \| 8, Pin::pe9 = GPIOE_BASE \| 9, Pin::pe10 = GPIOE_BASE \| 10, Pin::pe11 = GPIOE_BASE \| 11, Pin::pe12 = GPIOE_BASE \| 12, Pin::pe13 = GPIOE_BASE \| 13, Pin::pe14 = GPIOE_BASE \| 14, Pin::pe15 = GPIOE_BASE \| 15, Pin::pf0 = GPIOF_BASE \| 0, Pin::pf1 = GPIOF_BASE \| 1, Pin::pf2 = GPIOF_BASE \| 2, Pin::pf3 = GPIOF_BASE \| 3, Pin::pf4 = GPIOF_BASE \| 4, Pin::pf5 = GPIOF_BASE \| 5, Pin::pf6 = GPIOF_BASE \| 6, Pin::pf7 = GPIOF_BASE \| 7, Pin::pf8 = GPIOF_BASE \| 8, Pin::pf9 = GPIOF_BASE \| 9, Pin::pf10 = GPIOF_BASE \| 10, Pin::pf11 = GPIOF_BASE \| 11, Pin::pf12 = GPIOF_BASE \| 12, Pin::pf13 = GPIOF_BASE \| 13, Pin::pf14 = GPIOF_BASE \| 14, Pin::pf15 = GPIOF_BASE \| 15, Pin::pg0 = GPIOG_BASE \| 0, Pin::pg1 = GPIOG_BASE \| 1, Pin::pg2 = GPIOG_BASE \| 2, Pin::pg3 = GPIOG_BASE \| 3, Pin::pg4 = GPIOG_BASE \| 4, Pin::pg5 = GPIOG_BASE \| 5, Pin::pg6 = GPIOG_BASE \| 6, Pin::pg7 = GPIOG_BASE \| 7, Pin::pg8 = GPIOG_BASE \| 8, Pin::pg9 = GPIOG_BASE \| 9, Pin::pg10 = GPIOG_BASE \| 10, Pin::pg11 = GPIOG_BASE \| 11, Pin::pg12 = GPIOG_BASE \| 12, Pin::pg13 = GPIOG_BASE \| 13, Pin::pg14 = GPIOG_BASE \| 14, Pin::pg15 = GPIOG_BASE \| 15, Pin::ph0 = GPIOH_BASE \| 0, Pin::ph1 = GPIOH_BASE \| 1, Pin::ph2 = GPIOH_BASE \| 2, Pin::ph3 = GPIOH_BASE \| 3, Pin::ph4 = GPIOH_BASE \| 4, Pin::ph5 = GPIOH_BASE \| 5, Pin::ph6 = GPIOH_BASE \| 6, Pin::ph7 = GPIOH_BASE \| 7, Pin::ph8 = GPIOH_BASE \| 8, Pin::ph9 = GPIOH_BASE \| 9, Pin::ph10 = GPIOH_BASE \| 10, Pin::ph11 = GPIOH_BASE \| 11, Pin::ph12 = GPIOH_BASE \| 12, Pin::ph13 = GPIOH_BASE \| 13, Pin::ph14 = GPIOH_BASE \| 14, Pin::ph15 = GPIOH_BASE \| 15, Pin::pi0 = GPIOI_BASE \| 0, Pin::pi1 = GPIOI_BASE \| 1, Pin::pi2 = GPIOI_BASE \| 2, Pin::pi3 = GPIOI_BASE \| 3, Pin::pi4 = GPIOI_BASE \| 4, Pin::pi5 = GPIOI_BASE \| 5, Pin::pi6 = GPIOI_BASE \| 6, Pin::pi7 = GPIOI_BASE \| 7, Pin::pi8 = GPIOI_BASE \| 8, Pin::pi9 = GPIOI_BASE \| 9, Pin::pi10 = GPIOI_BASE \| 10, Pin::pi11 = GPIOI_BASE \| 11, Pin::pi12 = GPIOI_BASE \| 12, Pin::pi13 = GPIOI_BASE \| 13, Pin::pi14 = GPIOI_BASE \| 14, Pin::pi15 = GPIOI_BASE \| 15 }
	identifier of single pin - combined address of GPIO port with pin number More...

enum	PinAlternateFunction : uint8_t { PinAlternateFunction::af0, PinAlternateFunction::af1, PinAlternateFunction::af2, PinAlternateFunction::af3, PinAlternateFunction::af4, PinAlternateFunction::af5, PinAlternateFunction::af6, PinAlternateFunction::af7, PinAlternateFunction::af8, PinAlternateFunction::af9, PinAlternateFunction::af10, PinAlternateFunction::af11, PinAlternateFunction::af12, PinAlternateFunction::af13, PinAlternateFunction::af14, PinAlternateFunction::af15 }
	all possible alternate functions of pin More...

enum	PinMode : uint8_t { PinMode::input, PinMode::output, PinMode::alternateFunction, PinMode::analog }
	all possible modes of pin More...

enum	PinOutputSpeed : uint8_t { PinOutputSpeed::low, PinOutputSpeed::medium, PinOutputSpeed::high, PinOutputSpeed::veryHigh = 3 }
	all possible output speeds of pin More...

enum	PinPull : uint8_t { PinPull::none, PinPull::up, PinPull::down }
	all possible pull-up/pull-down configurations of pin More...

enum	DmaChannelFlags : uint32_t { DmaChannelFlags::transferCompleteInterruptDisable = 0 << 4, DmaChannelFlags::transferCompleteInterruptEnable = 1 << 4, DmaChannelFlags::dmaFlowController = 0 << 5, DmaChannelFlags::peripheralFlowController = 1 << 5, DmaChannelFlags::peripheralToMemory = 0 << 6, DmaChannelFlags::memoryToPeripheral = 1 << 6, DmaChannelFlags::peripheralFixed = 0 << 9, DmaChannelFlags::peripheralIncrement = 1 << 9, DmaChannelFlags::memoryFixed = 0 << 10, DmaChannelFlags::memoryIncrement = 1 << 10, DmaChannelFlags::peripheralDataSize1 = 0 << 11, DmaChannelFlags::peripheralDataSize2 = 1 << 11, DmaChannelFlags::peripheralDataSize4 = 2 << 11, DmaChannelFlags::memoryDataSize1 = 0 << 13, DmaChannelFlags::memoryDataSize2 = 1 << 13, DmaChannelFlags::memoryDataSize4 = 2 << 13, DmaChannelFlags::lowPriority = 0 << 16, DmaChannelFlags::mediumPriority = 1 << 16, DmaChannelFlags::highPriority = 2 << 16, DmaChannelFlags::veryHighPriority = 3 << 16, DmaChannelFlags::peripheralBurstSize1 = 0 << 21, DmaChannelFlags::peripheralBurstSize4 = 1 << 21, DmaChannelFlags::peripheralBurstSize8 = 2 << 21, DmaChannelFlags::peripheralBurstSize16 = 3 << 21, DmaChannelFlags::memoryBurstSize1 = 0 << 23, DmaChannelFlags::memoryBurstSize4 = 1 << 23, DmaChannelFlags::memoryBurstSize8 = 2 << 23, DmaChannelFlags::memoryBurstSize16 = 3 << 23, DmaChannelFlags::dataSize1 = peripheralDataSize1 \| memoryDataSize1, DmaChannelFlags::dataSize2 = peripheralDataSize2 \| memoryDataSize2, DmaChannelFlags::dataSize4 = peripheralDataSize4 \| memoryDataSize4, DmaChannelFlags::burstSize1 = peripheralBurstSize1 \| memoryBurstSize1, DmaChannelFlags::burstSize4 = peripheralBurstSize4 \| memoryBurstSize4, DmaChannelFlags::burstSize8 = peripheralBurstSize8 \| memoryBurstSize8, DmaChannelFlags::burstSize16 = peripheralBurstSize16 \| memoryBurstSize16 }
	DMA transfer configuration flags. More...

enum	SystemClockSource : uint8_t { SystemClockSource::hsi, SystemClockSource::hse, SystemClockSource::pll }
	system clock source More...

Functions
void	configurePin (Pin pin, PinMode mode, bool openDrain, PinOutputSpeed outputSpeed, PinPull pull, PinAlternateFunction alternateFunction, bool initialState={})
	Configures pin. More...

void	configureAlternateFunctionPin (const Pin pin, const PinAlternateFunction alternateFunction, const bool openDrain={}, const PinOutputSpeed outputSpeed={}, const PinPull pull={})
	Configures pin for "alternate function" mode. More...

void	configureAnalogPin (const Pin pin)
	Configures pin for "analog" mode. More...

void	configureInputPin (const Pin pin, const PinPull pull={})
	Configures pin for "input" mode. More...

void	configureOutputPin (const Pin pin, const bool openDrain={}, const PinOutputSpeed outputSpeed={}, const PinPull pull={}, const bool initialState={})
	Configures pin for "output" mode. More...

constexpr std::pair< GPIO_TypeDef *, uint8_t >	decodePin (const Pin pin)
	Decodes pin identifier into address of associated GPIO port and its pin number. More...

void	configureSpi (const SpiPeripheral &spiPeripheral, devices::SpiMode mode, uint32_t clockFrequency, uint8_t wordLength, bool lsbFirst)
	Configures parameters of raw SPI peripheral. More...

constexpr uint32_t	getBusFrequency (const uintptr_t peripheralBase)
	Returns frequency of the bus to which given peripheral is connected. More...

int	configureFlashLatency (uint8_t latency)
	Configures flash latency. More...

void	configureInstructionPrefetch (bool enable)
	Configures instruction prefetch. More...

void	disableDataCache ()
	Disables data cache. More...

void	disableInstructionCache ()
	Disables instruction cache. More...

void	enableDataCache ()
	Enables data cache. More...

void	enableInstructionCache ()
	Enables instruction cache. More...

int	configureVoltageScaling (uint8_t voltageScale)
	Configures voltage scaling. More...

int	configureAhbClockDivider (uint16_t hpre)
	Configures divider of AHB clock (HPRE value). More...

int	configureApbClockDivider (bool ppre2, uint8_t ppre)
	Configures divider of APB1 or APB2 clock (PPRE1 or PPRE2 value). More...

void	configurePllClockSource (bool hse)
	Configures clock source of main and audio PLLs. More...

int	configurePllInputClockDivider (uint8_t pllm)
	Configures divider of PLL input clock (PLLM value) for main and audio PLLs. More...

void	disableHse ()
	Disables HSE clock. More...

void	disablePll ()
	Disables main PLL. More...

void	enableHse (bool bypass)
	Enables HSE clock. More...

int	enablePll (uint16_t plln, uint8_t pllp, uint8_t pllq)
	Enables main PLL. More...

void	switchSystemClock (SystemClockSource source)
	Switches system clock. More...

Variables
constexpr uint32_t	hsiFrequency {16000000}
	HSI clock frequency, Hz. More...

constexpr uint32_t	minVcoInFrequency {1000000}
	minimum allowed value for VCO input frequency, Hz More...

constexpr uint32_t	maxVcoInFrequency {2000000}
	maximum allowed value for VCO input frequency, Hz More...

constexpr uint32_t	minVcoOutFrequency {100000000}
	minimum allowed value for VCO output frequency, Hz More...

constexpr uint32_t	maxVcoOutFrequency {432000000}
	maximum allowed value for VCO output frequency, Hz More...

constexpr uint32_t	maxPllOutFrequencies [3][2]

constexpr uint32_t	maxPllqOutFrequency {48000000}
	maximum allowed value for PLL "Q" output frequency, Hz More...

constexpr uint32_t	maxApb1Frequencies [2] {42000000, 42000000}

constexpr uint32_t	maxApb2Frequencies [2] {84000000, 84000000}

constexpr uint8_t	overDriveIndex {0}
	over-drive index for maxPllOutFrequencies array (maxPllOutFrequencies[voltageScaleIndex][overDriveIndex]) More...

constexpr uint8_t	voltageScaleIndex {DISTORTOS_CHIP_PWR_VOLTAGE_SCALE_MODE - 1}
	voltage scale index for maxPllOutFrequencies array (maxPllOutFrequencies[voltageScaleIndex][overDriveIndex]) More...

constexpr uint32_t	maxPllOutFrequency {maxPllOutFrequencies[voltageScaleIndex][overDriveIndex]}
	maximum allowed value for PLL output frequency, Hz More...

constexpr uint32_t	maxApb1Frequency {maxApb1Frequencies[overDriveIndex]}
	maximum allowed APB1 (low speed) frequency, Hz More...

constexpr uint32_t	maxApb2Frequency {maxApb2Frequencies[overDriveIndex]}
	maximum allowed APB2 (high speed) frequency, Hz More...

constexpr uint32_t	pllInFrequency {DISTORTOS_CHIP_RCC_HSE_FREQUENCY}
	PLL input frequency, Hz. More...

constexpr uint32_t	vcoInFrequency {pllInFrequency / DISTORTOS_CHIP_RCC_PLLM}
	VCO input frequency, Hz. More...

constexpr uint32_t	vcoOutFrequency {vcoInFrequency * DISTORTOS_CHIP_RCC_PLLN}
	VCO output frequency, Hz. More...

constexpr uint32_t	pllOutFrequency {vcoOutFrequency / DISTORTOS_CHIP_RCC_PLLP}
	PLL output frequency, Hz. More...

constexpr uint32_t	pllqOutFrequency {vcoOutFrequency / DISTORTOS_CHIP_RCC_PLLQ}
	PLL "Q" output frequency, Hz. More...

constexpr uint32_t	sysclkFrequency {pllOutFrequency}
	SYSCLK frequency, Hz. More...

constexpr uint32_t	ahbFrequency {sysclkFrequency / DISTORTOS_CHIP_RCC_HPRE}
	AHB frequency, Hz. More...

constexpr uint32_t	apb1Frequency {ahbFrequency / DISTORTOS_CHIP_RCC_PPRE1}
	APB1 frequency, Hz. More...

constexpr uint32_t	apb2Frequency {ahbFrequency / DISTORTOS_CHIP_RCC_PPRE2}
	APB2 frequency, Hz. More...

constexpr uint8_t	maxFlashLatency {7}
	maximum allowed value of flash latency More...

constexpr uint8_t	minVoltageScale {1}
	minimum allowed value of voltage scale mode More...

constexpr uint8_t	maxVoltageScale {2}
	maximum allowed value of voltage scale mode More...

constexpr uint8_t	defaultVoltageScale {1}
	default voltage scale mode after reset More...

constexpr uint8_t	minPllm {2}
	minimum allowed value for PLLM More...

constexpr uint8_t	maxPllm {63}
	maximum allowed value for PLLM More...

constexpr uint16_t	minPlln {50}
	minimum allowed value for PLLN More...

constexpr uint16_t	maxPlln {432}
	maximum allowed value for PLLN More...

constexpr uint8_t	minPllq {2}
	minimum allowed value for PLLQ More...

constexpr uint8_t	maxPllq {15}
	maximum allowed value for PLLQ More...

constexpr uint8_t	pllpDiv2 {2}
	first allowed value for PLLP - 2 More...

constexpr uint8_t	pllpDiv4 {4}
	second allowed value for PLLP - 4 More...

constexpr uint8_t	pllpDiv6 {6}
	third allowed value for PLLP - 6 More...

constexpr uint8_t	pllpDiv8 {8}
	fourth allowed value for PLLP - 8 More...

constexpr uint16_t	hpreDiv1 {1}
	first allowed value for AHB divider - 1 More...

constexpr uint16_t	hpreDiv2 {2}
	second allowed value for AHB divider - 2 More...

constexpr uint16_t	hpreDiv4 {4}
	third allowed value for AHB divider - 4 More...

constexpr uint16_t	hpreDiv8 {8}
	fourth allowed value for AHB divider - 8 More...

constexpr uint16_t	hpreDiv16 {16}
	fifth allowed value for AHB divider - 16 More...

constexpr uint16_t	hpreDiv64 {64}
	sixth allowed value for AHB divider - 64 More...

constexpr uint16_t	hpreDiv128 {128}
	seventh allowed value for AHB divider - 128 More...

constexpr uint16_t	hpreDiv256 {256}
	eighth allowed value for AHB divider - 256 More...

constexpr uint16_t	hpreDiv512 {512}
	ninth allowed value for AHB divider - 512 More...

constexpr uint8_t	ppreDiv1 {1}
	first allowed value for APB1 and APB2 dividers - 1 More...

constexpr uint8_t	ppreDiv2 {2}
	second allowed value for APB1 and APB2 dividers - 2 More...

constexpr uint8_t	ppreDiv4 {4}
	third allowed value for APB1 and APB2 dividers - 4 More...

constexpr uint8_t	ppreDiv8 {8}
	fourth allowed value for APB1 and APB2 dividers - 8 More...

constexpr uint8_t	ppreDiv16 {16}
	fifth allowed value for APB1 and APB2 dividers - 16 More...

Detailed Description

Chip-related code of distortos project.

Enumeration Type Documentation

◆ DmaChannelFlags

enum distortos::chip::DmaChannelFlags : uint32_t

strong

DMA transfer configuration flags.

Enumerator
transferCompleteInterruptDisable	"transfer complete" interrupt is disabled
transferCompleteInterruptEnable	"transfer complete" interrupt is enabled
dmaFlowController	DMA is the flow controller.
peripheralFlowController	peripheral is the flow controller
peripheralToMemory	transfer from peripheral to memory
memoryToPeripheral	transfer from memory to peripheral
peripheralFixed	peripheral address is fixed
peripheralIncrement	peripheral address is incremented after each transaction
memoryFixed	memory address is fixed
memoryIncrement	memory address is incremented after each transaction
peripheralDataSize1	peripheral data size - 1 byte
peripheralDataSize2	peripheral data size - 2 bytes
peripheralDataSize4	peripheral data size - 4 bytes
memoryDataSize1	memory data size - 1 byte
memoryDataSize2	memory data size - 2 bytes
memoryDataSize4	memory data size - 4 bytes
lowPriority	low priority
mediumPriority	medium priority
highPriority	high priority
veryHighPriority	very high priority
peripheralBurstSize1	peripheral burst size - single transfer
peripheralBurstSize4	peripheral burst size - incremental burst of 4 beats
peripheralBurstSize8	peripheral burst size - incremental burst of 8 beats
peripheralBurstSize16	peripheral burst size - incremental burst of 16 beats
memoryBurstSize1	memory burst size - single transfer
memoryBurstSize4	memory burst size - incremental burst of 4 beats
memoryBurstSize8	memory burst size - incremental burst of 8 beats
memoryBurstSize16	memory burst size - incremental burst of 16 beats
dataSize1	memory and peripheral data size - 1 byte
dataSize2	memory and peripheral data size - 2 bytes
dataSize4	memory and peripheral data size - 4 bytes
burstSize1	memory and peripheral burst size - single transfer
burstSize4	memory and peripheral burst size - incremental burst of 4 beats
burstSize8	memory and peripheral burst size - incremental burst of 8 beats
burstSize16	memory and peripheral burst size - incremental burst of 16 beats

◆ Pin

enum distortos::chip::Pin : uint32_t

strong

identifier of single pin - combined address of GPIO port with pin number

Enumerator
pa0	PA0 pin.
pa1	PA1 pin.
pa2	PA2 pin.
pa3	PA3 pin.
pa4	PA4 pin.
pa5	PA5 pin.
pa6	PA6 pin.
pa7	PA7 pin.
pa8	PA8 pin.
pa9	PA9 pin.
pa10	PA10 pin.
pa11	PA11 pin.
pa12	PA12 pin.
pa13	PA13 pin.
pa14	PA14 pin.
pa15	PA15 pin.
pb0	PB0 pin.
pb1	PB1 pin.
pb2	PB2 pin.
pb3	PB3 pin.
pb4	PB4 pin.
pb5	PB5 pin.
pb6	PB6 pin.
pb7	PB7 pin.
pb8	PB8 pin.
pb9	PB9 pin.
pb10	PB10 pin.
pb11	PB11 pin.
pb12	PB12 pin.
pb13	PB13 pin.
pb14	PB14 pin.
pb15	PB15 pin.
pc0	PC0 pin.
pc1	PC1 pin.
pc2	PC2 pin.
pc3	PC3 pin.
pc4	PC4 pin.
pc5	PC5 pin.
pc6	PC6 pin.
pc7	PC7 pin.
pc8	PC8 pin.
pc9	PC9 pin.
pc10	PC10 pin.
pc11	PC11 pin.
pc12	PC12 pin.
pc13	PC13 pin.
pc14	PC14 pin.
pc15	PC15 pin.
pd0	PD0 pin.
pd1	PD1 pin.
pd2	PD2 pin.
pd3	PD3 pin.
pd4	PD4 pin.
pd5	PD5 pin.
pd6	PD6 pin.
pd7	PD7 pin.
pd8	PD8 pin.
pd9	PD9 pin.
pd10	PD10 pin.
pd11	PD11 pin.
pd12	PD12 pin.
pd13	PD13 pin.
pd14	PD14 pin.
pd15	PD15 pin.
pe0	PE0 pin.
pe1	PE1 pin.
pe2	PE2 pin.
pe3	PE3 pin.
pe4	PE4 pin.
pe5	PE5 pin.
pe6	PE6 pin.
pe7	PE7 pin.
pe8	PE8 pin.
pe9	PE9 pin.
pe10	PE10 pin.
pe11	PE11 pin.
pe12	PE12 pin.
pe13	PE13 pin.
pe14	PE14 pin.
pe15	PE15 pin.
pf0	PF0 pin.
pf1	PF1 pin.
pf2	PF2 pin.
pf3	PF3 pin.
pf4	PF4 pin.
pf5	PF5 pin.
pf6	PF6 pin.
pf7	PF7 pin.
pf8	PF8 pin.
pf9	PF9 pin.
pf10	PF10 pin.
pf11	PF11 pin.
pf12	PF12 pin.
pf13	PF13 pin.
pf14	PF14 pin.
pf15	PF15 pin.
pg0	PG0 pin.
pg1	PG1 pin.
pg2	PG2 pin.
pg3	PG3 pin.
pg4	PG4 pin.
pg5	PG5 pin.
pg6	PG6 pin.
pg7	PG7 pin.
pg8	PG8 pin.
pg9	PG9 pin.
pg10	PG10 pin.
pg11	PG11 pin.
pg12	PG12 pin.
pg13	PG13 pin.
pg14	PG14 pin.
pg15	PG15 pin.
ph0	PH0 pin.
ph1	PH1 pin.
ph2	PH2 pin.
ph3	PH3 pin.
ph4	PH4 pin.
ph5	PH5 pin.
ph6	PH6 pin.
ph7	PH7 pin.
ph8	PH8 pin.
ph9	PH9 pin.
ph10	PH10 pin.
ph11	PH11 pin.
ph12	PH12 pin.
ph13	PH13 pin.
ph14	PH14 pin.
ph15	PH15 pin.
pi0	PI0 pin.
pi1	PI1 pin.
pi2	PI2 pin.
pi3	PI3 pin.
pi4	PI4 pin.
pi5	PI5 pin.
pi6	PI6 pin.
pi7	PI7 pin.
pi8	PI8 pin.
pi9	PI9 pin.
pi10	PI10 pin.
pi11	PI11 pin.
pi12	PI12 pin.
pi13	PI13 pin.
pi14	PI14 pin.
pi15	PI15 pin.

◆ PinAlternateFunction

enum distortos::chip::PinAlternateFunction : uint8_t

strong

all possible alternate functions of pin

Enumerator
af0	alternate function 0
af1	alternate function 1
af2	alternate function 2
af3	alternate function 3
af4	alternate function 4
af5	alternate function 5
af6	alternate function 6
af7	alternate function 7
af8	alternate function 8
af9	alternate function 9
af10	alternate function 10
af11	alternate function 11
af12	alternate function 12
af13	alternate function 13
af14	alternate function 14
af15	alternate function 15

◆ PinMode

enum distortos::chip::PinMode : uint8_t

strong

all possible modes of pin

Enumerator
input	input
output	output
alternateFunction	alternate function
analog	analog

◆ PinOutputSpeed

enum distortos::chip::PinOutputSpeed : uint8_t

strong

all possible output speeds of pin

Enumerator
low	low speed
medium	medium speed
high	high speed
veryHigh	very high speed

◆ PinPull

enum distortos::chip::PinPull : uint8_t

strong

all possible pull-up/pull-down configurations of pin

Enumerator
none	no pull-up/pull-down
up	pull-up
down	pull-down

◆ SystemClockSource

enum distortos::chip::SystemClockSource : uint8_t

strong

system clock source

Enumerator
hsi	HSI oscillator selected as system clock.
hse	HSE oscillator selected as system clock.
pll	main PLL selected as system clock

Function Documentation

◆ configureAhbClockDivider()

int distortos::chip::configureAhbClockDivider ( uint16_t hpre )

Configures divider of AHB clock (HPRE value).

Parameters

[in] hpre is the HPRE value, {1, 2, 4, 8, 16, 64, 128, 256, 512} or {hpreDiv1, hpreDiv2, hpreDiv4, hpreDiv8, hpreDiv16, hpreDiv64, hpreDiv128, hpreDiv256, hpreDiv512}

Returns

0 on success, error code otherwise:

EINVAL - hpre value is invalid;

◆ configureAlternateFunctionPin()

void distortos::chip::configureAlternateFunctionPin	(	const Pin	pin,
		const PinAlternateFunction	alternateFunction,
		const bool	openDrain = `{}`,
		const PinOutputSpeed	outputSpeed = `{}`,
		const PinPull	pull = `{}`
	)

inline

Configures pin for "alternate function" mode.

Parameters

[in]	pin	is the identifier of pin
[in]	alternateFunction	is the desired alternate function of pin
[in]	openDrain	is the desired output type of pin: push-pull (false) or open-drain (true), default - false
[in]	outputSpeed	is the desired output speed of pin, default - PinOutputSpeed::low
[in]	pull	is the desired pull-up/pull-down configuration of pin, default - PinPull::none

◆ configureAnalogPin()

void distortos::chip::configureAnalogPin ( const Pin pin )

inline

Configures pin for "analog" mode.

Parameters

[in] pin is the identifier of pin

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◆ configureApbClockDivider()

int distortos::chip::configureApbClockDivider	(	bool	ppre2,
		uint8_t	ppre
	)

Configures divider of APB1 or APB2 clock (PPRE1 or PPRE2 value).

Parameters

[in]	ppre2	selects whether PPRE1 (false) or PPRE2 (true) is configured
[in]	ppre	is the PPRE value, {1, 2, 4, 8, 16} or {ppreDiv1, ppreDiv2, ppreDiv4, ppreDiv8, ppreDiv16}

Returns

0 on success, error code otherwise:

EINVAL - ppre value is invalid;

◆ configureFlashLatency()

int distortos::chip::configureFlashLatency ( uint8_t latency )

Configures flash latency.

Parameters

[in] latency is the new flash latency, [0; maxFlashLatency]

Returns

0 on success, error code otherwise:

EINVAL - latency value is invalid;

◆ configureInputPin()

void distortos::chip::configureInputPin	(	const Pin	pin,
		const PinPull	pull = `{}`
	)

inline

Configures pin for "input" mode.

Parameters

[in]	pin	is the identifier of pin
[in]	pull	is the desired pull-up/pull-down configuration of pin, default - PinPull::none

◆ configureInstructionPrefetch()

void distortos::chip::configureInstructionPrefetch ( bool enable )

Configures instruction prefetch.

Parameters

[in] enable selects whether instruction prefetch will be disabled (false) or enabled (true)

◆ configureOutputPin()

void distortos::chip::configureOutputPin	(	const Pin	pin,
		const bool	openDrain = `{}`,
		const PinOutputSpeed	outputSpeed = `{}`,
		const PinPull	pull = `{}`,
		const bool	initialState = `{}`
	)

inline

Configures pin for "output" mode.

Parameters

[in]	pin	is the identifier of pin
[in]	openDrain	is the desired output type of pin: push-pull (false) or open-drain (true), default - false
[in]	outputSpeed	is the desired output speed of pin, default - PinOutputSpeed::low
[in]	pull	is the desired pull-up/pull-down configuration of pin, default - PinPull::none
[in]	initialState	is the initial state of pin, default - false

◆ configurePin()

void distortos::chip::configurePin	(	Pin	pin,
		PinMode	mode,
		bool	openDrain,
		PinOutputSpeed	outputSpeed,
		PinPull	pull,
		PinAlternateFunction	alternateFunction,
		bool	initialState = `{}`
	)

Configures pin.

Parameters

[in]	pin	is the identifier of pin
[in]	mode	is the desired mode of pin
[in]	openDrain	is the desired output type of pin: push-pull (false) or open-drain (true)
[in]	outputSpeed	is the desired output speed of pin
[in]	pull	is the desired pull-up/pull-down configuration of pin
[in]	alternateFunction	is the desired alternate function of pin
[in]	initialState	is the initial state of pin, default - false

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◆ configurePllClockSource()

void distortos::chip::configurePllClockSource ( bool hse )

Configures clock source of main and audio PLLs.

Warning: Before changing configuration of any PLL make sure that they are not used in any way (as core clock or as source of peripheral clocks) and that they are disabled.

Parameters

[in] hse selects whether HSI (false) or HSE (true) is used as clock source of main and audio PLLs

◆ configurePllInputClockDivider()

int distortos::chip::configurePllInputClockDivider ( uint8_t pllm )

Configures divider of PLL input clock (PLLM value) for main and audio PLLs.

Warning: Before changing configuration of any PLL make sure that they are not used in any way (as core clock or as source of peripheral clocks) and that they are disabled.

Parameters

[in] pllm is the PLLM value for main and audio PLLs, [2; 63] or [minPllm; maxPllm]

Returns

0 on success, error code otherwise:

EINVAL - pllm value is invalid;

◆ configureSpi()

void distortos::chip::configureSpi	(	const SpiPeripheral &	spiPeripheral,
		devices::SpiMode	mode,
		uint32_t	clockFrequency,
		uint8_t	wordLength,
		bool	lsbFirst
	)

Configures parameters of raw SPI peripheral.

Precondition: clockFrequency is greater than or equal to spiPeripheral.getPeripheralFrequency() / 256.; wordLength is valid.

Parameters

[in]	spiPeripheral	is a reference to raw SPI peripheral
[in]	mode	is the desired SPI mode
[in]	clockFrequency	is the desired clock frequency, Hz
[in]	wordLength	selects word length, bits, {8, 16}
[in]	lsbFirst	selects whether MSB (false) or LSB (true) is transmitted first

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◆ configureVoltageScaling()

int distortos::chip::configureVoltageScaling ( uint8_t voltageScale )

Configures voltage scaling.

Warning: Voltage scaling can be configured only when PLL is disabled.

Parameters

[in] voltageScale is the new voltage scale mode, [minVoltageScale; maxVoltageScale]

Returns

0 on success, error code otherwise:

EINVAL - voltageScale value is invalid;

◆ decodePin()

constexpr std::pair<GPIO_TypeDef*, uint8_t> distortos::chip::decodePin ( const Pin pin )

Decodes pin identifier into address of associated GPIO port and its pin number.

Parameters

[in] pin is the identifier of pin

Returns: pair with address of GPIO port and pin number

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◆ disableDataCache()

void distortos::chip::disableDataCache ( )

Disables data cache.

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◆ disableHse()

void distortos::chip::disableHse ( )

Disables HSE clock.

Warning: Before changing configuration of HSE clock make sure that it is not used in any way (as core clock, as source for any PLL or as source of RTC clock).

◆ disableInstructionCache()

void distortos::chip::disableInstructionCache ( )

Disables instruction cache.

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◆ disablePll()

void distortos::chip::disablePll ( )

Disables main PLL.

Warning: Before changing configuration of main PLL make sure that it is not used in any way (as core clock or as source of peripheral clocks).

◆ enableDataCache()

void distortos::chip::enableDataCache ( )

Enables data cache.

The cache is first disabled, then reset and finally enabled.

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◆ enableHse()

void distortos::chip::enableHse ( bool bypass )

Enables HSE clock.

Enables HSE clock using crystal/ceramic resonator (bypass disabled) or external user clock (bypass enabled). This function waits until the HSE oscillator is stable after enabling the clock.

Warning: Before changing configuration of HSE clock make sure that it is not used in any way (as core clock, as source for any PLL or as source of RTC clock).

Parameters

[in] bypass selects whether crystal/ceramic resonator (false) or external user clock (true) is used

◆ enableInstructionCache()

void distortos::chip::enableInstructionCache ( )

Enables instruction cache.

The cache is first disabled, then reset and finally enabled.

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◆ enablePll()

int distortos::chip::enablePll	(	uint16_t	plln,
		uint8_t	pllp,
		uint8_t	pllq
	)

Enables main PLL.

Enables main PLL using selected parameters and waits until it is stable.

Warning: Before changing configuration of main PLL make sure that it is not used in any way (as core clock or as source of peripheral clocks) and that it is disabled.

Parameters

[in]	plln	is the PLLN value for main PLL, [minPlln; maxPlln]
[in]	pllp	is the PLLP value for main PLL, {2, 4, 6, 8} or {pllpDiv2, pllpDiv4, pllpDiv6, pllpDiv8}
[in]	pllq	is the PLLQ value for main PLL, [2; 15] or [minPllq; maxPllq]

Returns

0 on success, error code otherwise:

EINVAL - plln or pllp or pllq value is invalid;

◆ getBusFrequency()

constexpr uint32_t distortos::chip::getBusFrequency ( const uintptr_t peripheralBase )

Returns frequency of the bus to which given peripheral is connected.

Parameters

[in] peripheralBase is the base address of peripheral

Returns: peripheral's bus frequency, Hz

◆ switchSystemClock()

void distortos::chip::switchSystemClock ( SystemClockSource source )

Switches system clock.

Parameters

[in] source is the new source of system clock

Variable Documentation

◆ ahbFrequency

constexpr uint32_t distortos::chip::ahbFrequency {sysclkFrequency / DISTORTOS_CHIP_RCC_HPRE}

AHB frequency, Hz.

◆ apb1Frequency

constexpr uint32_t distortos::chip::apb1Frequency {ahbFrequency / DISTORTOS_CHIP_RCC_PPRE1}

APB1 frequency, Hz.

◆ apb2Frequency

constexpr uint32_t distortos::chip::apb2Frequency {ahbFrequency / DISTORTOS_CHIP_RCC_PPRE2}

APB2 frequency, Hz.

◆ defaultVoltageScale

constexpr uint8_t distortos::chip::defaultVoltageScale {1}

default voltage scale mode after reset

◆ hpreDiv1

constexpr uint16_t distortos::chip::hpreDiv1 {1}

first allowed value for AHB divider - 1

◆ hpreDiv128

constexpr uint16_t distortos::chip::hpreDiv128 {128}

seventh allowed value for AHB divider - 128

◆ hpreDiv16

constexpr uint16_t distortos::chip::hpreDiv16 {16}

fifth allowed value for AHB divider - 16

◆ hpreDiv2

constexpr uint16_t distortos::chip::hpreDiv2 {2}

second allowed value for AHB divider - 2

◆ hpreDiv256

constexpr uint16_t distortos::chip::hpreDiv256 {256}

eighth allowed value for AHB divider - 256

◆ hpreDiv4

constexpr uint16_t distortos::chip::hpreDiv4 {4}

third allowed value for AHB divider - 4

◆ hpreDiv512

constexpr uint16_t distortos::chip::hpreDiv512 {512}

ninth allowed value for AHB divider - 512

◆ hpreDiv64

constexpr uint16_t distortos::chip::hpreDiv64 {64}

sixth allowed value for AHB divider - 64

◆ hpreDiv8

constexpr uint16_t distortos::chip::hpreDiv8 {8}

fourth allowed value for AHB divider - 8

◆ hsiFrequency

constexpr uint32_t distortos::chip::hsiFrequency {16000000}

HSI clock frequency, Hz.

◆ maxApb1Frequencies

constexpr uint32_t distortos::chip::maxApb1Frequencies[2] {42000000, 42000000}

maximum allowed APB1 (low speed) frequencies, Hz [0] - over-drive disabled [1] - over-drive enabled

◆ maxApb1Frequency

constexpr uint32_t distortos::chip::maxApb1Frequency {maxApb1Frequencies[overDriveIndex]}

maximum allowed APB1 (low speed) frequency, Hz

◆ maxApb2Frequencies

constexpr uint32_t distortos::chip::maxApb2Frequencies[2] {84000000, 84000000}

maximum allowed APB2 (high speed) frequencies, Hz [0] - over-drive disabled [1] - over-drive enabled

◆ maxApb2Frequency

constexpr uint32_t distortos::chip::maxApb2Frequency {maxApb2Frequencies[overDriveIndex]}

maximum allowed APB2 (high speed) frequency, Hz

◆ maxFlashLatency

constexpr uint8_t distortos::chip::maxFlashLatency {7}

maximum allowed value of flash latency

◆ maxPllm

constexpr uint8_t distortos::chip::maxPllm {63}

maximum allowed value for PLLM

◆ maxPlln

constexpr uint16_t distortos::chip::maxPlln {432}

maximum allowed value for PLLN

◆ maxPllOutFrequencies

constexpr uint32_t distortos::chip::maxPllOutFrequencies[3][2]

Initial value:

{
        {168000000, 168000000},
        {144000000, 144000000},
        {144000000, 144000000},
}

maximum allowed values for PLL output frequency, Hz [...][0] - over-drive disabled [...][1] - over-drive enabled [0][...] - voltage scale 1 [1][...] - voltage scale 2 [2][...] - voltage scale 3

◆ maxPllOutFrequency

constexpr uint32_t distortos::chip::maxPllOutFrequency {maxPllOutFrequencies[voltageScaleIndex][overDriveIndex]}

maximum allowed value for PLL output frequency, Hz

◆ maxPllq

constexpr uint8_t distortos::chip::maxPllq {15}

maximum allowed value for PLLQ

◆ maxPllqOutFrequency

constexpr uint32_t distortos::chip::maxPllqOutFrequency {48000000}

maximum allowed value for PLL "Q" output frequency, Hz

◆ maxVcoInFrequency

constexpr uint32_t distortos::chip::maxVcoInFrequency {2000000}

maximum allowed value for VCO input frequency, Hz

◆ maxVcoOutFrequency

constexpr uint32_t distortos::chip::maxVcoOutFrequency {432000000}

maximum allowed value for VCO output frequency, Hz

◆ maxVoltageScale

constexpr uint8_t distortos::chip::maxVoltageScale {2}

maximum allowed value of voltage scale mode

◆ minPllm

constexpr uint8_t distortos::chip::minPllm {2}

minimum allowed value for PLLM

◆ minPlln

constexpr uint16_t distortos::chip::minPlln {50}

minimum allowed value for PLLN

◆ minPllq

constexpr uint8_t distortos::chip::minPllq {2}

minimum allowed value for PLLQ

◆ minVcoInFrequency

constexpr uint32_t distortos::chip::minVcoInFrequency {1000000}

minimum allowed value for VCO input frequency, Hz

◆ minVcoOutFrequency

constexpr uint32_t distortos::chip::minVcoOutFrequency {100000000}

minimum allowed value for VCO output frequency, Hz

◆ minVoltageScale

constexpr uint8_t distortos::chip::minVoltageScale {1}

minimum allowed value of voltage scale mode

◆ overDriveIndex

constexpr uint8_t distortos::chip::overDriveIndex {0}

over-drive index for maxPllOutFrequencies array (maxPllOutFrequencies[voltageScaleIndex][overDriveIndex])

◆ pllInFrequency

constexpr uint32_t distortos::chip::pllInFrequency {DISTORTOS_CHIP_RCC_HSE_FREQUENCY}

PLL input frequency, Hz.

◆ pllOutFrequency

constexpr uint32_t distortos::chip::pllOutFrequency {vcoOutFrequency / DISTORTOS_CHIP_RCC_PLLP}

PLL output frequency, Hz.

◆ pllpDiv2

constexpr uint8_t distortos::chip::pllpDiv2 {2}

first allowed value for PLLP - 2

◆ pllpDiv4

constexpr uint8_t distortos::chip::pllpDiv4 {4}

second allowed value for PLLP - 4

◆ pllpDiv6

constexpr uint8_t distortos::chip::pllpDiv6 {6}

third allowed value for PLLP - 6

◆ pllpDiv8

constexpr uint8_t distortos::chip::pllpDiv8 {8}

fourth allowed value for PLLP - 8

◆ pllqOutFrequency

constexpr uint32_t distortos::chip::pllqOutFrequency {vcoOutFrequency / DISTORTOS_CHIP_RCC_PLLQ}

PLL "Q" output frequency, Hz.

◆ ppreDiv1

constexpr uint8_t distortos::chip::ppreDiv1 {1}

first allowed value for APB1 and APB2 dividers - 1

◆ ppreDiv16

constexpr uint8_t distortos::chip::ppreDiv16 {16}

fifth allowed value for APB1 and APB2 dividers - 16

◆ ppreDiv2

constexpr uint8_t distortos::chip::ppreDiv2 {2}

second allowed value for APB1 and APB2 dividers - 2

◆ ppreDiv4

constexpr uint8_t distortos::chip::ppreDiv4 {4}

third allowed value for APB1 and APB2 dividers - 4

◆ ppreDiv8

constexpr uint8_t distortos::chip::ppreDiv8 {8}

fourth allowed value for APB1 and APB2 dividers - 8

◆ sysclkFrequency

constexpr uint32_t distortos::chip::sysclkFrequency {pllOutFrequency}

SYSCLK frequency, Hz.

◆ vcoInFrequency

constexpr uint32_t distortos::chip::vcoInFrequency {pllInFrequency / DISTORTOS_CHIP_RCC_PLLM}

VCO input frequency, Hz.

◆ vcoOutFrequency

constexpr uint32_t distortos::chip::vcoOutFrequency {vcoInFrequency * DISTORTOS_CHIP_RCC_PLLN}

VCO output frequency, Hz.

◆ voltageScaleIndex

constexpr uint8_t distortos::chip::voltageScaleIndex {DISTORTOS_CHIP_PWR_VOLTAGE_SCALE_MODE - 1}

voltage scale index for maxPllOutFrequencies array (maxPllOutFrequencies[voltageScaleIndex][overDriveIndex])

Classes

Enumerations

Functions

Variables

Detailed Description

Enumeration Type Documentation

◆ DmaChannelFlags

◆ Pin

◆ PinAlternateFunction

◆ PinMode

◆ PinOutputSpeed

◆ PinPull

◆ SystemClockSource

Function Documentation

◆ configureAhbClockDivider()

◆ configureAlternateFunctionPin()

◆ configureAnalogPin()

◆ configureApbClockDivider()

◆ configureFlashLatency()

◆ configureInputPin()

◆ configureInstructionPrefetch()

◆ configureOutputPin()

◆ configurePin()

◆ configurePllClockSource()

◆ configurePllInputClockDivider()

◆ configureSpi()

◆ configureVoltageScaling()

◆ decodePin()

◆ disableDataCache()

◆ disableHse()

◆ disableInstructionCache()

◆ disablePll()

◆ enableDataCache()

◆ enableHse()

◆ enableInstructionCache()

◆ enablePll()

◆ getBusFrequency()

◆ switchSystemClock()

Variable Documentation

◆ ahbFrequency

◆ apb1Frequency

◆ apb2Frequency

◆ defaultVoltageScale

◆ hpreDiv1

◆ hpreDiv128

◆ hpreDiv16

◆ hpreDiv2

◆ hpreDiv256

◆ hpreDiv4

◆ hpreDiv512

◆ hpreDiv64

◆ hpreDiv8

◆ hsiFrequency

◆ maxApb1Frequencies

◆ maxApb1Frequency

◆ maxApb2Frequencies

◆ maxApb2Frequency

◆ maxFlashLatency

◆ maxPllm

◆ maxPlln

◆ maxPllOutFrequencies

◆ maxPllOutFrequency

◆ maxPllq

◆ maxPllqOutFrequency

◆ maxVcoInFrequency

◆ maxVcoOutFrequency

◆ maxVoltageScale

◆ minPllm

◆ minPlln

◆ minPllq

◆ minVcoInFrequency

◆ minVcoOutFrequency

◆ minVoltageScale

◆ overDriveIndex

◆ pllInFrequency

◆ pllOutFrequency

◆ pllpDiv2

◆ pllpDiv4

◆ pllpDiv6

◆ pllpDiv8