distortos  v0.4.0
object-oriented C++ RTOS for microcontrollers
clocks.hpp
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1 
12 #ifndef SOURCE_CHIP_STM32_STM32F4_INCLUDE_DISTORTOS_CHIP_CLOCKS_HPP_
13 #define SOURCE_CHIP_STM32_STM32F4_INCLUDE_DISTORTOS_CHIP_CLOCKS_HPP_
14 
16 
17 #include <cstdint>
18 
19 namespace distortos
20 {
21 
22 namespace chip
23 {
24 
25 /*---------------------------------------------------------------------------------------------------------------------+
26 | global constants
27 +---------------------------------------------------------------------------------------------------------------------*/
28 
30 constexpr uint32_t hsiFrequency {16000000};
31 
33 constexpr uint32_t minVcoInFrequency {1000000};
34 
36 constexpr uint32_t maxVcoInFrequency {2000000};
37 
39 #if defined(CONFIG_CHIP_STM32F401)
40 constexpr uint32_t minVcoOutFrequency {192000000};
41 #else // !defined(CONFIG_CHIP_STM32F401)
42 constexpr uint32_t minVcoOutFrequency {100000000};
43 #endif // !defined(CONFIG_CHIP_STM32F401)
44 
46 constexpr uint32_t maxVcoOutFrequency {432000000};
47 
54 #if defined(CONFIG_CHIP_STM32F401)
55 constexpr uint32_t maxPllOutFrequencies[3][2]
56 {
57  {84000000, 84000000},
58  {84000000, 84000000},
59  {60000000, 60000000},
60 };
61 #elif defined(CONFIG_CHIP_STM32F405) || defined(CONFIG_CHIP_STM32F407) || defined(CONFIG_CHIP_STM32F415) || \
62  defined(CONFIG_CHIP_STM32F417)
63 constexpr uint32_t maxPllOutFrequencies[3][2]
64 {
65  {168000000, 168000000},
66  {144000000, 144000000},
67  {144000000, 144000000},
68 };
69 #elif defined(CONFIG_CHIP_STM32F410) || defined(CONFIG_CHIP_STM32F411) || defined(CONFIG_CHIP_STM32F412) || \
70  defined(CONFIG_CHIP_STM32F413) || defined(CONFIG_CHIP_STM32F423)
71 constexpr uint32_t maxPllOutFrequencies[3][2]
72 {
73  {100000000, 100000000},
74  {84000000, 84000000},
75  {64000000, 64000000},
76 };
77 #else // !defined(CONFIG_CHIP_STM32F401) && !defined(CONFIG_CHIP_STM32F405) && !defined(CONFIG_CHIP_STM32F407) &&
78  // !defined(CONFIG_CHIP_STM32F410) && !defined(CONFIG_CHIP_STM32F411) && !defined(CONFIG_CHIP_STM32F412) &&
79  // !defined(CONFIG_CHIP_STM32F413) && !defined(CONFIG_CHIP_STM32F415) && !defined(CONFIG_CHIP_STM32F417) &&
80  // !defined(CONFIG_CHIP_STM32F423)
81 constexpr uint32_t maxPllOutFrequencies[3][2]
82 {
83  {168000000, 180000000},
84  {144000000, 144000000},
85  {120000000, 120000000},
86 };
87 #endif // !defined(CONFIG_CHIP_STM32F401) && !defined(CONFIG_CHIP_STM32F405) && !defined(CONFIG_CHIP_STM32F407) &&
88  // !defined(CONFIG_CHIP_STM32F410) && !defined(CONFIG_CHIP_STM32F411) && !defined(CONFIG_CHIP_STM32F412) &&
89  // !defined(CONFIG_CHIP_STM32F413) && !defined(CONFIG_CHIP_STM32F415) && !defined(CONFIG_CHIP_STM32F417) &&
90  // !defined(CONFIG_CHIP_STM32F423)
91 
93 constexpr uint32_t maxPllqOutFrequency {48000000};
94 
98 #if defined(CONFIG_CHIP_STM32F401) || defined(CONFIG_CHIP_STM32F405) || defined(CONFIG_CHIP_STM32F407) || \
99  defined(CONFIG_CHIP_STM32F415) || defined(CONFIG_CHIP_STM32F417)
100 constexpr uint32_t maxApb1Frequencies[2] {42000000, 42000000};
101 #elif defined(CONFIG_CHIP_STM32F410) || defined(CONFIG_CHIP_STM32F411) || defined(CONFIG_CHIP_STM32F412) || \
102  defined(CONFIG_CHIP_STM32F413) || defined(CONFIG_CHIP_STM32F423)
103 constexpr uint32_t maxApb1Frequencies[2] {50000000, 50000000};
104 #else // !defined(CONFIG_CHIP_STM32F401) && !defined(CONFIG_CHIP_STM32F405) && !defined(CONFIG_CHIP_STM32F407) &&
105  // !defined(CONFIG_CHIP_STM32F410) && !defined(CONFIG_CHIP_STM32F411) && !defined(CONFIG_CHIP_STM32F412) &&
106  // !defined(CONFIG_CHIP_STM32F413) && !defined(CONFIG_CHIP_STM32F415) && !defined(CONFIG_CHIP_STM32F417) &&
107  // !defined(CONFIG_CHIP_STM32F423)
108 constexpr uint32_t maxApb1Frequencies[2] {42000000, 45000000};
109 #endif // !defined(CONFIG_CHIP_STM32F401) && !defined(CONFIG_CHIP_STM32F405) && !defined(CONFIG_CHIP_STM32F407) &&
110  // !defined(CONFIG_CHIP_STM32F410) && !defined(CONFIG_CHIP_STM32F411) && !defined(CONFIG_CHIP_STM32F412) &&
111  // !defined(CONFIG_CHIP_STM32F413) && !defined(CONFIG_CHIP_STM32F415) && !defined(CONFIG_CHIP_STM32F417) &&
112  // !defined(CONFIG_CHIP_STM32F423)
113 
117 #if defined(CONFIG_CHIP_STM32F401) || defined(CONFIG_CHIP_STM32F405) || defined(CONFIG_CHIP_STM32F407) || \
118  defined(CONFIG_CHIP_STM32F415) || defined(CONFIG_CHIP_STM32F417)
119 constexpr uint32_t maxApb2Frequencies[2] {84000000, 84000000};
120 #elif defined(CONFIG_CHIP_STM32F410) || defined(CONFIG_CHIP_STM32F411) || defined(CONFIG_CHIP_STM32F412) || \
121  defined(CONFIG_CHIP_STM32F413) || defined(CONFIG_CHIP_STM32F423)
122 constexpr uint32_t maxApb2Frequencies[2] {100000000, 100000000};
123 #else // !defined(CONFIG_CHIP_STM32F401) && !defined(CONFIG_CHIP_STM32F405) && !defined(CONFIG_CHIP_STM32F407) &&
124  // !defined(CONFIG_CHIP_STM32F410) && !defined(CONFIG_CHIP_STM32F411) && !defined(CONFIG_CHIP_STM32F412) &&
125  // !defined(CONFIG_CHIP_STM32F413) && !defined(CONFIG_CHIP_STM32F415) && !defined(CONFIG_CHIP_STM32F417) &&
126  // !defined(CONFIG_CHIP_STM32F423)
127 constexpr uint32_t maxApb2Frequencies[2] {84000000, 90000000};
128 #endif // !defined(CONFIG_CHIP_STM32F401) && !defined(CONFIG_CHIP_STM32F405) && !defined(CONFIG_CHIP_STM32F407) &&
129  // !defined(CONFIG_CHIP_STM32F410) && !defined(CONFIG_CHIP_STM32F411) && !defined(CONFIG_CHIP_STM32F412) &&
130  // !defined(CONFIG_CHIP_STM32F413) && !defined(CONFIG_CHIP_STM32F415) && !defined(CONFIG_CHIP_STM32F417) &&
131  // !defined(CONFIG_CHIP_STM32F423)
132 
133 #ifdef CONFIG_CHIP_STM32F4_STANDARD_CLOCK_CONFIGURATION_ENABLE
134 
135 #if (defined(CONFIG_CHIP_STM32F427) || defined(CONFIG_CHIP_STM32F429) || defined(CONFIG_CHIP_STM32F43) || \
136  defined(CONFIG_CHIP_STM32F446) || defined(CONFIG_CHIP_STM32F469) || defined(CONFIG_CHIP_STM32F479)) && \
137  defined(CONFIG_CHIP_STM32F4_PWR_OVER_DRIVE_ENABLE)
138 
139 static_assert(CONFIG_CHIP_STM32F4_PWR_VOLTAGE_SCALE_MODE == 1, "Over-drive mode requires voltage scale 1 mode!");
140 static_assert(CONFIG_CHIP_STM32F4_VDD_MV >= 2100,
141  "Over-drive mode must not be enabled when supply voltage is below 2.1V!");
142 
144 constexpr uint8_t overDriveIndex {1};
145 
146 #else // !(defined(CONFIG_CHIP_STM32F427) || defined(CONFIG_CHIP_STM32F429) || defined(CONFIG_CHIP_STM32F43) ||
147  // defined(CONFIG_CHIP_STM32F446) || defined(CONFIG_CHIP_STM32F469) || defined(CONFIG_CHIP_STM32F479)) ||
148  // !defined(CONFIG_CHIP_STM32F4_PWR_OVER_DRIVE_ENABLE)
149 
151 constexpr uint8_t overDriveIndex {0};
152 
153 #endif // !(defined(CONFIG_CHIP_STM32F427) || defined(CONFIG_CHIP_STM32F429) || defined(CONFIG_CHIP_STM32F43) ||
154  // defined(CONFIG_CHIP_STM32F446) || defined(CONFIG_CHIP_STM32F469) || defined(CONFIG_CHIP_STM32F479)) ||
155  // !defined(CONFIG_CHIP_STM32F4_PWR_OVER_DRIVE_ENABLE)
156 
158 constexpr uint8_t voltageScaleIndex {CONFIG_CHIP_STM32F4_PWR_VOLTAGE_SCALE_MODE - 1};
159 
162 
165 
168 
169 #ifdef CONFIG_CHIP_STM32F4_RCC_PLL_ENABLE
170 
172 #if defined(CONFIG_CHIP_STM32F4_RCC_PLLSRC_HSI)
173 constexpr uint32_t pllInFrequency {hsiFrequency};
174 #elif defined(CONFIG_CHIP_STM32F4_RCC_PLLSRC_HSE)
175 constexpr uint32_t pllInFrequency {CONFIG_CHIP_STM32F4_RCC_HSE_FREQUENCY};
176 #endif
177 
179 constexpr uint32_t vcoInFrequency {pllInFrequency / CONFIG_CHIP_STM32F4_RCC_PLLM};
180 
182  "Invalid VCO input frequency!");
183 
185 constexpr uint32_t vcoOutFrequency {vcoInFrequency * CONFIG_CHIP_STM32F4_RCC_PLLN};
186 
188  "Invalid VCO output frequency!");
189 
191 constexpr uint32_t pllOutFrequency {vcoOutFrequency / CONFIG_CHIP_STM32F4_RCC_PLLP};
192 
193 static_assert(pllOutFrequency <= maxPllOutFrequency, "Invalid PLL output frequency!");
194 
196 constexpr uint32_t pllqOutFrequency {vcoOutFrequency / CONFIG_CHIP_STM32F4_RCC_PLLQ};
197 
198 static_assert(pllqOutFrequency <= maxPllqOutFrequency, "Invalid PLL \"/Q\" output frequency!");
199 
200 #if defined(CONFIG_CHIP_STM32F412) || defined(CONFIG_CHIP_STM32F413) || defined(CONFIG_CHIP_STM32F423) || \
201  defined(CONFIG_CHIP_STM32F446) || defined(CONFIG_CHIP_STM32F469) || defined(CONFIG_CHIP_STM32F479)
202 
204 constexpr uint32_t pllrOutFrequency {vcoOutFrequency / CONFIG_CHIP_STM32F4_RCC_PLLR};
205 
206 #endif // defined(CONFIG_CHIP_STM32F412) || defined(CONFIG_CHIP_STM32F413) || defined(CONFIG_CHIP_STM32F423) ||
207  // defined(CONFIG_CHIP_STM32F446) || defined(CONFIG_CHIP_STM32F469) || defined(CONFIG_CHIP_STM32F479)
208 
209 #endif // def CONFIG_CHIP_STM32F4_RCC_PLL_ENABLE
210 
212 #if defined(CONFIG_CHIP_STM32F4_RCC_SYSCLK_HSI)
213 constexpr uint32_t sysclkFrequency {hsiFrequency};
214 #elif defined(CONFIG_CHIP_STM32F4_RCC_SYSCLK_HSE)
215 constexpr uint32_t sysclkFrequency {CONFIG_CHIP_STM32F4_RCC_HSE_FREQUENCY};
216 #elif defined(CONFIG_CHIP_STM32F4_RCC_SYSCLK_PLL)
217 constexpr uint32_t sysclkFrequency {pllOutFrequency};
218 #elif defined(CONFIG_CHIP_STM32F4_RCC_SYSCLK_PLLR)
219 constexpr uint32_t sysclkFrequency {pllrOutFrequency};
220 #endif // defined(CONFIG_CHIP_STM32F4_RCC_SYSCLK_PLLR)
221 
222 #else // !def CONFIG_CHIP_STM32F4_STANDARD_CLOCK_CONFIGURATION_ENABLE
223 
225 constexpr uint32_t sysclkFrequency {CONFIG_CHIP_STM32F4_RCC_SYSCLK_FREQUENCY};
226 
228 constexpr uint32_t maxApb1Frequency {maxApb1Frequencies[1]};
229 
231 constexpr uint32_t maxApb2Frequency {maxApb2Frequencies[1]};
232 
233 #endif // !def CONFIG_CHIP_STM32F4_STANDARD_CLOCK_CONFIGURATION_ENABLE
234 
236 constexpr uint32_t ahbFrequency {sysclkFrequency / CONFIG_CHIP_STM32F4_RCC_HPRE};
237 
239 constexpr uint32_t apb1Frequency {ahbFrequency / CONFIG_CHIP_STM32F4_RCC_PPRE1};
240 
241 static_assert(apb1Frequency <= maxApb1Frequency, "Invalid APB1 (low speed) frequency!");
242 
244 constexpr uint32_t apb2Frequency {ahbFrequency / CONFIG_CHIP_STM32F4_RCC_PPRE2};
245 
246 static_assert(apb2Frequency <= maxApb2Frequency, "Invalid APB2 (high speed) frequency!");
247 
248 } // namespace chip
249 
250 } // namespace distortos
251 
252 #endif // SOURCE_CHIP_STM32_STM32F4_INCLUDE_DISTORTOS_CHIP_CLOCKS_HPP_
constexpr uint32_t minVcoInFrequency
minimum allowed value for VCO input frequency, Hz
Definition: clocks.hpp:33
constexpr uint32_t pllOutFrequency
PLL output frequency, Hz.
Definition: clocks.hpp:191
constexpr uint32_t maxApb1Frequency
maximum allowed APB1 (low speed) frequency, Hz
Definition: clocks.hpp:164
constexpr uint32_t pllqOutFrequency
PLL "Q" output frequency, Hz.
Definition: clocks.hpp:196
constexpr uint32_t maxPllqOutFrequency
maximum allowed value for PLL "Q" output frequency, Hz
Definition: clocks.hpp:93
constexpr uint32_t maxPllOutFrequencies[3][2]
Definition: clocks.hpp:64
constexpr uint32_t vcoOutFrequency
VCO output frequency, Hz.
Definition: clocks.hpp:185
constexpr uint32_t maxPllOutFrequency
maximum allowed value for PLL output frequency, Hz
Definition: clocks.hpp:161
constexpr uint32_t apb1Frequency
APB1 frequency, Hz.
Definition: clocks.hpp:239
constexpr uint32_t apb2Frequency
APB2 frequency, Hz.
Definition: clocks.hpp:244
distortos configuration
constexpr uint32_t vcoInFrequency
VCO input frequency, Hz.
Definition: clocks.hpp:179
constexpr uint32_t maxApb2Frequencies[2]
Definition: clocks.hpp:119
Top-level namespace of distortos project.
constexpr uint32_t minVcoOutFrequency
minimum allowed value for VCO output frequency, Hz
Definition: clocks.hpp:42
constexpr uint32_t ahbFrequency
AHB frequency, Hz.
Definition: clocks.hpp:236
constexpr uint32_t hsiFrequency
HSI clock frequency, Hz.
Definition: clocks.hpp:30
constexpr uint32_t maxVcoInFrequency
maximum allowed value for VCO input frequency, Hz
Definition: clocks.hpp:36
constexpr uint32_t maxApb1Frequencies[2]
Definition: clocks.hpp:100
constexpr uint32_t maxVcoOutFrequency
maximum allowed value for VCO output frequency, Hz
Definition: clocks.hpp:46
constexpr uint8_t voltageScaleIndex
voltage scale index for maxPllOutFrequencies array (maxPllOutFrequencies[voltageScaleIndex][overDrive...
Definition: clocks.hpp:158
constexpr uint32_t sysclkFrequency
SYSCLK frequency, Hz.
Definition: clocks.hpp:217
constexpr uint8_t overDriveIndex
over-drive index for maxPllOutFrequencies array (maxPllOutFrequencies[voltageScaleIndex][overDriveInd...
Definition: clocks.hpp:151
constexpr uint32_t maxApb2Frequency
maximum allowed APB2 (high speed) frequency, Hz
Definition: clocks.hpp:167
constexpr uint32_t pllInFrequency
PLL input frequency, Hz.
Definition: clocks.hpp:175